The performance of computer systems depends in large part upon the efficiency of communications between the computer and peripheral storage devices such as disk drives. The amount of time it takes for data to be stored on or retrieved from a disk drive is considerable when compared to the time it takes for the computer to operate on the data once retrieved. A substantial portion of the time it takes for data to be stored on or retrieved from a disk drive is spent waiting for the disk drive to physically locate the correct data location.
It is known in the art that the performance of a computer system can be improved by allowing the computer to perform other operations while waiting for the disk drive to locate the desired data. It is also known that the computer may even request data from a second disk drive while waiting for the first to locate the required data.
In a typical computer system, multiple peripherals will be electrically connected to a computer over a common bus. A disk drive operation involves the computer sending information to a disk drive over the bus, thereby informing the disk drive of the task required. While the disk drive is positioning its read/write head so as to access the correct data location, the computer is idle and is theoretically free to perform other tasks. These other tasks may involve communication with other peripheral devices on the bus.
For purposes of the present invention, a communication between two devices such as a computer and a disk drive will be referred to as a thread. Single threading means that only one thread (communication) is active at a time. In single-threaded computer system, the computer completes a command to one disk drive prior to issuing a command to another disk drive. Multi-threading occurs if multiple threads are active simultaneously. In a multi-threaded computer system, the computer may issue a command to a second disk drive prior to completion of a previously issued command to a first disk drive.
Multi-threading is accomplished by temporarily suspending execution of one thread and beginning execution of another, eventually restoring the suspended thread to complete its execution. In order to perform multi-threaded operations, the computer is required to internally store context information for multiple threads, update context information at appropriate times during execution of the thread, and uniquely identify threads and the context information related to each of the threads.
Prior art methods of managing multi-threaded operations have involved older peripherals and interface technologies. Lacking internal intelligence, peripheral operations were performed under the direct control of the computer or a separate controller, with the computer acting as a "Master" and the peripheral device acting as a "Slave". Under this arrangement, the computer (or controller) was empowered to make peripheral context switches (switches between threads) whenever it determined that a switch was appropriate.
With the advent of intelligent interfaces such as the Small Computer Systems Interface (SCSI), controller operations are now built into the disk drive itself, and the computer no longer governs the details of disk drive operation. As such, the computer no longer has access to enough information to determine the appropriateness of a task switch in a multi-threaded environment. In SCSI, the computer doesn't even control the sequence of communication between the computer and the disk drive. Rather than acting as a Master, the computer acts as an "Initiator" device, in that the computer initiates the establishment of thread communication, and issues commands. The peripheral device no longer acts as a Slave, but rather as a "Target" device, in that it receives commands from an Initiator, but executes them under the control of its own intelligence.
Since the computer does not control the sequence of communication, it is left with no means to suspend thread execution, thereby depriving the computer of the capability to autonomously make the task switch decision as required in prior art multi-threaded environments.
For example, in older systems, the computer or controller kept track of where the data head in a disk drive was physically positioned. Based upon this information, the computer could determine how long it would take for the head to be repositioned to a desired new location, and thus could decide whether there was sufficient time to begin execution of other threads while waiting. With embedded SCSI interface drives, the physical location of the data head is not known to the computer, and thus there is insufficient information for the computer to determine how long repositioning of the head will take and whether a context switch would be advantageous. Furthermore, because the communication phases in SCSI are controlled by the Target device, the computer is left without a means to suspend thread execution. Thus, in a SCSI system the decision to suspend thread execution can be made only by the disk drive controller, after which the computer may or may not choose to begin execution of another thread.
This represents a relatively new philosophy in computer peripheral management, and requires that the computer treat peripheral operations in a new manner. Prior art multi-threading provides neither the software nor the peripheral driver structure necessary for multi-thread operations in this new environment.
In addition, prior art multi-threading has been used primarily in larger systems due to its complexity and the fact that it generally provides benefit only where there are multiple peripheral devices attached to the same computer. As users of small computer systems continue to demand increased performance, and as small computers are used to perform more advanced tasks, small computer systems are more often being equipped with multiple peripheral devices. This provides both the opportunity and the need for multi-threading in the peripheral architectures of smaller computer systems.
Unfortunately, incorporating prior art multi-threading techniques into modern small systems architectures would involve substantial rewriting of existing operating systems and peripheral handling routines.
As multi-threading of peripheral operations using newer intelligent interfaces becomes more common, there is also a need for peripheral manufacturers to efficiently test peripheral devices for proper multi-thread operation. In the same way that it is desirable to avoid excessive rewriting of existing operating systems, it is also desirable to avoid substantial re-writing of existing peripheral test sequences.
It is clear that there is a need for a method of controlling peripheral multi-thread operation for use with modern intelligent peripheral interfaces. It is also clear that there is a need for a multi-thread control method which is structured in such a way as to minimize the impact of adding multi-thread support to existing operating system and peripheral tester code.